1. Field of the Invention
The invention relates to a phase locked loop circuit and more particularly to a reference slaving circuit that is particularly immune to reference signal jitter and maintains a constant phase relationship over a range of frequencies.
2. Description of the Related Technology
It is often necessary in communications, digital audio and many other applications to lock to an external clock or reference while generating a new clock source that is immune to various sources of phase and frequency noise in the incoming reference signal. This function can be accomplished utilizing phase locked loop techniques. A common method of generating a high frequency system clock from a low frequency reference signal is through the use of a phase locked loop circuit. There are various methods of implementing a phase locked loop circuit but all phase locked loop circuits have three central portions: a phase detector portion, a loop filter portion, and a voltage controlled oscillator portion. The phase detector portion has a first input for receiving a reference clock signal, and a second input for receiving feed-back from the output of the voltage controlled oscillator portion. The output of the voltage controlled oscillator portion is also the output signal of the phase locked loop circuit. The output of the phase detector portion is connected to an input of a loop filter. The loop filter operates as a low pass filter. The output of the loop filter is used to control the voltage controlled oscillator. A direct connection establishes a 1:1 phase locked loop. A connection through a frequency divider enables generation of frequency multiples.
The output of the phase detector portion provides a signal which is proportional to the phase difference between the reference signal and the feed-back signal. In response to the phase detector the loop filter portion provides an output signal that is a function of the input signal from the phase detector portion. The voltage controlled oscillator portion provides an output frequency that is proportional to the output of the loop filter. The feed-back from the voltage controlled oscillator to the phase detector is necessary to generate an output in phase lock with the input reference signal.
Depending on the application, each of the portions of the phase locked loop circuit is implemented using specific digital or analog circuits. There are tradeoffs between the characteristics of the various components when implemented using digital or analog circuits or when implemented by different types of components within the class of digital or within the class of analog components.
U.S. Pat. No. 5,036,294 entitled Phase Locked Loop having Low Frequency Jitter Compensation discusses some of these tradeoffs. Furthermore, available monolithic phase locked loop circuits offer multiple selectable components of varying types in order to allow an application designer to select desirable characteristics for a particular application.